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Browsing Tag

Cadence

7 posts
TTechnology
HBM Becomes Testbed For 3D Assembly Yield
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HBM Becomes Testbed For 3D Assembly Yield

  • August 11, 2026
Key Takeaways: DFT is increasingly critical for detecting defects in memory cells, TSVs, microbumps, and high-speed interfaces, while…
TTechnology
Untangling Chip Traffic Jams
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Untangling Chip Traffic Jams

  • July 23, 2026
Key Takeaways: Defining all possible cases of coherent and non-coherent traffic is non-trivial, and designers need to use…
HHealthcare
This Startup Says It Saves Medicare More Than $2 Million A Week
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This Startup Says It Saves Medicare More Than $2 Million A Week

  • June 23, 2026
Cadence’s Chris Altchek CadenceCadence reached a $1.2 billion valuation by using AI to track seniors’ chronic health conditions…
TTechnology
Redefining AI Inference With New Silicon Architecture
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Redefining AI Inference With New Silicon Architecture

  • April 9, 2026
Low Power-High Performance SPONSOR BLOG Validating an optimized data movement architecture that ensures arithmetic units receive a steady…
TTechnology
AI Starting To Simplify Design Of Programmable Logic
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AI Starting To Simplify Design Of Programmable Logic

  • February 26, 2026
Key Takeaways AI/ML and agentic tools are getting better at helping design and compile FPGAs, but downstream programming…
TTechnology
Addressing Critical Tradeoffs In NPU Design
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Addressing Critical Tradeoffs In NPU Design

  • January 21, 2026
Experts At The Table: AI/ML are driving a steep ramp in neural processing unit (NPU) design activity for…
AArtificial intelligence
China’s chip leaders bank on AI, EVs, RISC-V as industry’s future growth engines
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China’s chip leaders bank on AI, EVs, RISC-V as industry’s future growth engines

  • November 16, 2025
The use of chips for artificial intelligence and electric vehicles (EVs) will offer strong demand underpinning the development…
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