Key Takeaways<\/p>\n
Engineers leverage both device-specific and tool-level data to identify a process \u201csweet spot.\u201d
\nTight, frequent tool-to-tool matching enables greater yield and fab flexibility.
\nMachine learning helps capture the nuances of a tool\u2019s signature.<\/p>\n
Many people outside of the semiconductor industry wonder how humans can fabricate transistors with tens of nanometer scale dimensions on a consistent basis, day in and day out, from one process tool to another, one line to another, and one fab site to another. One way this is achieved is through tool-to-tool matching (TTTM). But TTTM is getting much more difficult as fabs produce increasingly complex chips with smaller features and process windows.<\/p>\n
Wafers can undergo 600 to 800 process steps over the course of 3 months, so the tools must produce consistent results. The systems that check these results in metrology and test must meet some of the highest standards.<\/p>\n
\u201cThe latest tech nodes require hundreds of tightly interdependent process steps in multi-patterning, high-k\/metal gate, complex etch chemistries, selective deposition, buried power rails, etc. Across the entire fabrication process, every tiny process imperfection may accumulate as a compound effect that affects the yield,\u201d said PeiFen Teh, director of applications engineering at Onto Innovation<\/a>. \u201cThus, TTTM spec at every critical process step is essential to ensure process stability throughout the process line.\u201d<\/p>\n Shorter product lifecycles, the need for faster yield ramps, and a diverse supply chain also challenge tool matching operations. \u201cIt\u2019s getting more critical and harder to perform because we have a distributed supply chain with a higher product mix, and we need to produce identical test outcomes,\u201d said Eli Roth, product manager of SMART manufacturing at Teradyne<\/a>. \u201cYou\u2019re looking for transparency on more complex devices. Guard bands are constantly being tightened, advanced packaging is putting more dies together, so you\u2019re looking for more repeatability on the device, and that\u2019s applying more pressure on your test to reduce error contributors as much as possible. And the ramps are faster, so you have less time to stabilize your NPI base before you\u2019re in production.\u201d<\/p>\n Tool matching (aka chamber matching) ensures consistent outputs, for instance, from one ATE tool to another of the same model. There are various ways this is accomplished, but it starts with a NIST-traceable standard wafer that checks the accuracy of different measurements such as CDs. Then, tools are matched by adjusting hardware settings until critical outputs match. For advanced nodes, data-driven machine learning models simulate the complex, nonlinear bias between tools. The fab then repeats these steps for other tools in the fleet.<\/p>\n Sometimes a best or average tool is employed. \u201cGolden tools or test vehicles are widely used. We like to characterize a reference with a known-good vehicle, and then statistically align the rest of the fleet against that behavior,\u201d said Roth. It is also important to quantify the amount of variation associated with the measurement system itself.<\/p>\n Tool matching is not a \u201cone and done\u201d step. In fact, the more leading-edge the process, the more frequently the tools are likely to be matched. Still, there are clear times when tool-to-tool matching is required:<\/p>\n At tool installation\/qualification; More data sharing is needed to meet leading device maker\u2019s needs. \u201cWhile baseline tool matching using manufacturer-provided data is expected, device makers are now demanding deeper alignment at critical process steps to ensure consistent device performance. Achieving this level of matching requires access to fab-level device data, such as metrology results and functional test outcomes,\u201d said Melvin Lee Wei Heng, director of applications engineering at Onto Innovation. \u201cLeveraging this device-specific information in combination with tool-level data is now essential to confirm that tools are operating within the process \u2018sweet spot\u2019 and delivering uniform performance across the manufacturing line.\u201d<\/p>\n \u201cWe use a lot of VLSI NIST traceable standards for step heights and linewidth measurements. But beyond just the calibration of a system, we also match the optics to make sure that when a recipe is transferred from one tool to another, there\u2019s no change in the illumination settings, the optics are the same and the illumination of the systems is the same,\u201d said Andrew Lopez, application engineer at Bruker<\/a>.\u00a0 For example, using standard wafers the engineer can adjust tools such as calipers or sensors to within strict tolerances. \u201cWe look at the linearity of multiple different step heights and multiple different linewidths to make sure that the system is sensitive enough to detect variation coming in from the process.\u201d<\/p>\n While they are related, tool matching is not the same as tool fingerprinting or capturing a tool\u2019s \u201csignature.\u201d Every tool in a fab \u2014 a scanner, etcher, cleaner, tester, optical inspection system, etc. \u2014 has its own microscopic irregularities in machined parts or wear-and-tear artifacts. As a result, identical systems behave slightly differently even when executing the same recipe. By capturing and analyzing this signature, engineers can align performance tool-to-tool. [Editor\u2019s Note: A future story will address matching of process tools.]<\/p>\n Fingerprinting may or may not benefit from the introduction of machine learning models. \u201cTraditional fingerprinting methods depend on engineered features, control charts, and threshold-based comparisons. These approaches work well when variation is low-dimensional and predictable,\u201d said Vincent Chu, senior consulting manager for Advantest<\/a> Cloud Solutions. \u201cHowever, today\u2019s testers collect far richer data \u2014 high-resolution parametrics, waveform signatures, timing measurements, and continuous telemetry. In these higher-dimensional spaces, ML models can capture subtle, non-linear behaviors that define a tool\u2019s true operating \u2018signature.\u2019 This enables a more accurate and scalable representation of a tester\u2019s behavioral baseline without relying entirely on predefined metrics.\u201d<\/p>\n In metrology, as in testing, both precision and accuracy are important metrics. Accuracy is how close a measurement is to its true value. It can be achieved by comparing measurements to those of a known standard, such as a standard wafer with multiple features, but it is difficult to attain.<\/p>\n \u201cWe would love to make sure every metrology output can be labeled as accurate, but that is almost never the case. We almost always settle for precision, and then when we have a certain level of experience over time of hitting that target, we get a good yield at the end,\u201d said Chris Mack, co-founder and CTO of Fractilia. \u201cSo we\u2019ll call that \u2018accurate,\u2019 but it\u2019s not really a number that is accurate in the sense of a NIST standard metrology result. Still, precision continues to be the more important characteristic of a metrology tool that we pay the most attention to.\u201d<\/p>\n Precision is determined by taking a measurement of the same feature multiple times and recording the variability around a central value.<\/p>\n How tool matching works Increasingly, metrology measurements are correlated with electrical test results. \u201cTools are typically matched based on a hierarchy of steps, and each fab or OEM may approach it slightly differently,\u201d said Joe Fillion, director of product management at Onto Innovation. \u201cIt starts with a fingerprint or configuration comparison. Tools need to be as closely matched from a software and hardware standpoint \u2014 same software version, lenses, apertures, light source, MFCs, etc. Once there is a reasonable match, tools will often perform standard auto-test or calibration routines to ensure behavior is consistent across tools. If results are consistent and meet the intended specification, standard qualification runs are performed to measure actual performance on the wafer. These results will have a target value with an upper and lower limit to ensure operation within an acceptable range.\u201d<\/p>\n Onto\u2019s Teh provided a step-by-step guide to tool matching. \u201cWe align the performance of each tool component first and monitor the fleet tool matching performance,\u201d he said, including:<\/p>\n Component-level calibration: Monitoring system health check parameters and applying calibration when out of specifications; On testers, engineers need to keep a handle on component drift. \u201cThermal sensor drifts over time,\u201d said Teradyne\u2019s Roth. \u201cThere\u2019s timing skew. We generally manage drift through period calibration and reference checks, and we\u2019re continuously checking our equipment to our reference scanner so we know how far off that can be and when we have to do period calibration. SPC monitoring and big data monitoring are other ways to test that. Like the hammer that\u2019s always looking for the nail, we\u2019re probably looking at periodic calculations.\u201d<\/p>\n Depending on a tool\u2019s configuration, sometimes tool-level calibration can be built in. \u201cOur tester is based on a high-precision resistor, so it uses a self-verification method to ensure that each measurement is correct. That\u2019s how we affirm that each tool is calibrated and provides consistent measurements across testers,\u201d said Jesse Ko, COO of Modus Test<\/a>.<\/p>\n Electrical test and metrology often work hand in hand, as well. \u201cFabs have incorporated in-line electrical\/functional tests to ensure a tool is performing to the level where it has no impact on the device,\u201d said Onto\u2019s Heng. \u201cIn certain critical process steps, cross-sectional analysis is done to ensure the profile formed is per-device specs for sensitive layers where conventional metrology measurements are inadequate.\u201d<\/p>\n A different way of looking at the problem is to start looking at outcomes, rather than tools, and working backward from there. This is essentially what Intel did when its \u201cCopy Exact\u201d strategy, which replicated everything in a fab exactly \u2014 equipment, methodologies, and processes \u2014 produced different results. The company ultimately narrowed the cause down to environmental conditions such as humidity. Calibrating equipment may just be the first step in a complex investigation.<\/p>\n
\nWhen new products or new processes are introduced;
\nAfter a corrective-maintenance or preventive-maintenance routine;
\nAfter an instrument or component set is replaced, and
\nAt regular intervals such as once a day, once a shift, or once a lot (advanced nodes).<\/p>\n
The metrics that are matched depend on the tool. For example, in acoustic microscope imaging, metrics include image intensity, signal amplitude, depth response, and defect detectability. \u201cWe utilize LTSM (Long-Term Stability Monitoring) or Global Tool Matching. This uses a known or reference sample and software algorithm to compensate for any system-to-system variation by normalizing the acoustic image response, so inspection results remain consistent from tool to tool and site to site,\u201d said Bryan Schackmuth, product line manager of AMI at Nordson<\/a>. \u201cThe LTSM allows for image normalization without requiring manual operator adjustments to achieve matched images. This global matching procedure is typically run any time a change is made to the operating frequency (for example, when changing the transducers), or before the start of each shift or each day.\u201d<\/p>\n
\nSystem-level calibration: Examining the spectral response of a fleet of tools measured on a standard wafer;
\nSpectral calibration: Used to improve the fleet matching level, and
\nParametric results monitoring: This is done using a standard wafer (measuring CD, thickness, or material constants). Recalibration may be applied to optimize the tool matching level on each parameter.<\/p>\n