{"id":382420,"date":"2026-04-09T02:16:23","date_gmt":"2026-04-09T02:16:23","guid":{"rendered":"https:\/\/www.newsbeep.com\/il\/382420\/"},"modified":"2026-04-09T02:16:23","modified_gmt":"2026-04-09T02:16:23","slug":"intel-and-sambanova-team-up-on-heterogenous-ai-inference-platform-different-hardware-performs-different-workloads","status":"publish","type":"post","link":"https:\/\/www.newsbeep.com\/il\/382420\/","title":{"rendered":"Intel and SambaNova team up on heterogenous AI inference platform \u2014 different hardware performs different workloads"},"content":{"rendered":"

Intel and SambaNova on Wednesday announced<\/a> their joint production-ready heterogeneous inference architecture that relies on AI accelerators or GPUs for prefill, SambaNova reconfigurable dataflow units (RDUs) SN50<\/a> for decode, and Xeon 6 processors for agentic tools and system orchestration. The platform is designed to address as broad a set of workloads as possible to siphon some of the market share away from Nvidia and other emerging players.<\/p>\n

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\"Microsoft\n<\/p>\n

(Image credit: Microsoft)<\/p>\n

The heterogeneous inference platform by Intel and SambaNova separates inference into distinct stages handled by different silicon: It uses AI GPUs or AI accelerators for ingesting long prompts and building key-value caches; SambaNova’s SN50 RDU for decoding and generating tokens; and Xeon 6 processors for running agent-related operations (e.g., compiling and executing code and validating outputs) as well as coordinating and distributing workloads across hardware. <\/p>\n

Splitting prefill, decode, and token generation stages is similar to Nvidia’s approach to its Rubin platform, which is based on the Rubin CPX<\/a> and heavy-duty Rubin GPU with HBM4 memory \u2014 with the obvious difference that the Rubin CPX is not coming to market<\/a>. But, more importantly for Intel, the new platform will rely on its Xeon 6 processors \u2014 not on competing offerings.<\/p>\n

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\"SambaNova\"\n<\/p>\n

(Image credit: SambaNova)<\/p>\n

The solution is scheduled to be available in the second half of 2026 to enterprises, cloud operators, and sovereign AI programs seeking scalable inference platforms in general and coding agents, and other agentic workloads in particular, completely in-house.<\/p>\n

According to SambaNova’s internal data, Xeon 6 achieves over 50% faster LLVM compilation compared to Arm-based server CPUs, and delivers up to 70% higher performance in vector database workloads, relative to competing x86 processors \u2014 namely, AMD EPYC<\/a>. These gains are intended to shorten end-to-end development cycles for coding agents and similar applications, the two companies claim.<\/p>\n

Perhaps the biggest advantage of the joint production-ready heterogeneous inference architecture is that SambaNova SN50 and Xeon-based servers are drop-in compatible with data centers that can handle 30kW \u2014 which is the vast majority of enterprise<\/a> data centers. <\/p>\n

“The data center software ecosystem is built on x86, and it runs on Xeon \u2014 providing a mature, proven foundation that developers, enterprises, and cloud providers rely on at scale,” said Kevork Kechichian, Executive Vice President and General Manager of the Data Center Group (DCG) at Intel Corporation. “Workloads of the future will require a heterogeneous mix of computing, and this collaboration with SambaNova delivers a cost\u2011efficient, high\u2011performance inference architecture designed to meet customer needs at scale \u2014 powered by Xeon 6.”<\/p>\n

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