Three years is an eternity in mobile tech. Since Qualcomm dropped the Snapdragon W5 and W5+ Gen 1 chips back in 2022, the company has largely ghosted the wearable SoC scene. Google’s Pixel Watch lineup still relies on the aging W5+ platform, and outside of Samsung’s in-house silicon efforts, there hasn’t been much movement. Even the best Wear OS devices fall short in hardware-related metrics like battery life. But a new leak might finally signal a change — and it could be big.
According to Android Authority insider Kamila Wojciechowska, Qualcomm is currently testing a new wearable chip, internally dubbed SW6100, and codenamed Aspen. While there’s no official branding just yet (W6 Gen 1? W5 Gen 2?), this leak gives us the clearest picture yet of where Wear OS hardware might be headed next.
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The Mobvoi TicWatch Pro 5, one of two smartwatches to use the Snapdragon W5+ SoC so far, along with the Xiaomi Watch 2 Pro.
Historically, Qualcomm’s approach to smartwatch chips has felt like an afterthought. Most Snapdragon Wear platforms have been Frankenstein’s monsters, underpowered smartphone silicon with a bit of sensor glue and wireless duct tape. Even the much-touted W5+ Gen 1 leaned heavily on off-the-shelf IP for its QCC5100 coprocessor, rather than leveraging Qualcomm’s in-house capabilities.
But Aspen could mark a shift in priorities. The SW6100 is reportedly built on a TSMC process node — a good sign, given TSMC’s clear efficiency lead over Samsung fabs. Battery life improvements might come from another angle too: the chip upgrades its RAM controller to LPDDR5X, up from LPDDR4, offering more speed and better power efficiency.
Most interestingly, Wojciechowska says the chip features a 1x Cortex-A78 + 4x Cortex-A55 CPU core configuration. That’s a dramatic leap from the Cortex-A53s Qualcomm has been coasting on since 2012. The A78 is a modern performance core, and while the A55 is no spring chicken either, it’s a meaningful generational upgrade for wearables. It’s the same CPU layout found in Samsung’s new Exynos W1000 — coincidence? Probably not.
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The W5 family proved a huge improvement over the 4100 series.
A new coprocessor, QCC6100, is also in the mix, though details are scarce for now.
What’s missing from all this is RISC-V. Google and Qualcomm once made noise about the open source ISA, but this Cortex-based leak suggests its RISC-V wearables plan is either on hold or shelved entirely. Given the lack of powerful license-ready RISC-V cores, that’s not surprising.
No release window has been confirmed, but if SW6100 reaches production, 2026 seems like a safe bet. And for a platform stuck in limbo, even the hint of fresh silicon is a reason for Wear OS fans to pay attention.
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