A new technical paper titled “Fault-Free Analog Computing with Imperfect Hardware” was published by researchers at The University of Hong Kong, University of Oxford, and Hewlett Packard Labs.

Abstract
“The surging demand for computational power, particularly for edge computing and AI, drives research into alternative paradigms like analog in-memory computing using memristors. These approaches compute with physical laws and overcome data movement bottlenecks by performing computations directly within memory. However, the inherent susceptibility of analog systems to device failures (stuck-at-faults) and variations critically limits their precision and reliability. Existing fault-tolerance techniques, including redundancy and retraining, often prove insufficient or impractical for many high-precision applications, general-purpose computations involving fixed, non-trainable matrices, and AI scenarios where privacy is a concern. Here, we introduce and experimentally demonstrate a fault-free matrix representation where any target matrix is decomposed into a product of two adjustable sub-matrices programmed onto the analog hardware. This indirect, adaptive representation allows mathematical optimization to bypass faulty devices and eliminate differential pairs, significantly enhancing computational density. Our memristor-based system achieved over 99.999% cosine similarity for a Discrete Fourier Transform matrix despite a 39% device fault rate – a fidelity that conventional direct representation cannot achieve, failing with only one single device (a 0.01% rate). Furthermore, we demonstrated a 56-fold bit-error-rate reduction in a wireless communication prototype and over 196% density and 179% energy efficiency improvements in cross-domain benchmarks compared to state-of-the-art techniques. This method, validated on memristors, is broadly applicable to other emerging memories and non-electrical, photonic, and quantum computing substrates. Thus, this work shows that the device yield and inherent imperfections are no longer the primary critical bottlenecks in emerging analog computing hardware, enables highly robust and efficient signal processing, communication and AI on the network edge.”

Find the technical paper here.  July 2025.

Z Xu, J Liu, S Huang, Z Li, S Wang, B Wen, R Mao, M Jiang, G Pedretti, J Ignowski, K Huang, C Li, “Fault-Free Analog Computing with Imperfect Hardware,” arXiv preprint arXiv:2507.11134 (2025).