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Validating an optimized data movement architecture that ensures arithmetic units receive a steady stream of data every cycle.
AI inference is rapidly becoming the largest and most demanding segment of the AI market, but the cost of running these workloads continues to be a major challenge. VSORA, a fabless semiconductor company, is tackling this problem head-on with a fresh approach to high‑performance AI processing and a deep collaboration with Cadence.
VSORA develops advanced AI chips that dramatically reduce the cost per query for data centers while enabling powerful edge AI applications. Its Jotunn8 architecture targets hyperscale inference workloads, while the Tyr product family focuses on high‑performance edge use cases such as autonomous driving.
At the heart of VSORA’s innovation is a completely rethought data‑movement architecture. By optimizing how data flows through silicon and ensuring arithmetic units receive a steady stream of data every cycle, VSORA achieves significantly higher utilization and processing efficiency than traditional solutions, without compromising on the embedded memory needed for today’s massive neural networks.
To bring this architecture to life, VSORA relies extensively on Cadence’s end‑to‑end design and verification ecosystem. Their collaboration spans the full flow, from early architectural simulation to physical implementation, packaging, and board design.
VSORA uses Cadence Palladium Enterprise Emulation to run long simulations. As it’s available on the cloud, it’s flexible to use when needed. Cadence’s Xcelium Logic Simulation is used for RTL simulation, Genus Synthesis Solution and Innovus Implementation System for physical implementation, Modus for DFT and ATPG, Allegro X Design Platform for PCB design, and the Sigrity X Platform for signal and power integrity simulation. In addition, VSORA also sought help from Cadence’s design services team to build its chip and leverage its expertise in areas such as physical implementation and front-end design.
This comprehensive toolchain allowed VSORA to simulate and validate the full system, from power management to interposers to power grids, ensuring that their silicon performs reliably in real‑world conditions.
With Jotunn8 heading into deployment and development already underway on its next-generation chips at even more advanced nodes, VSORA’s partnership with Cadence continues to be central to advancing AI inference performance and efficiency. Learn more about how VSORA is redefining AI inference with Cadence.
Tanushri Shah   (all posts)
Tanushri Shah is a marketing editor at Cadence.